%FILENAME%
vtr-9.0.0-1.2-x86_64_v4.pkg.tar.zst

%NAME%
vtr

%BASE%
vtr

%VERSION%
9.0.0-1.2

%DESC%
Verilog to Routing -- Open Source CAD Flow for FPGA Research

%CSIZE%
9185669

%ISIZE%
30331972

%SHA256SUM%
5c17eb2ffc629cb708aef5aad9a4958ecb7f09019974457d71ef4a09cfcd8ab9

%URL%
https://verilogtorouting.org

%LICENSE%
MIT

%ARCH%
x86_64_v4

%BUILDDATE%
1750034076

%PACKAGER%
CachyOS <admin@cachyos.org>

%DEPENDS%
ctags
tbb

%MAKEDEPENDS%
cmake
wget

